Mastering ePWM Trip Zones with TMS320F28069

Overview

Texas Instruments produces the well-liked TMS320F28069 microcontroller, which is renowned for its adaptability and capabilities in a wide range of applications, including motor control and power electronics. The Enhanced Pulse Width Modulation (ePWM) module, which provides fine control over PWM signals, is one of its primary characteristics. In this article, we will examine the ePWM trip zones, look at the code you gave, and discuss the key components of trip zones. We will also perform calculations for the conversion of trip zone time.

Overview of ePWM Trip Zones

Trip zones are a powerful feature in the TMS320F28069 that lets you monitor particular situations and perform predetermined actions when these criteria are fulfilled. These issues are frequently connected to the fault detection and protection processes in power electronics and motor control systems.

Flow control diagram of the trip-zone

Your code snippet illustrates how trip zones for ePWM1 are set up and used. Let’s dissect the code to learn how trip zones are configured and used.

Initialization

In the main function, you first initialize the system control (InitSysCtrl), GPIO (InitGpio), and configure GPIO pins for ePWM and trip zones (GpioConfig). Then, you call InitEPwm_1 to initialize ePWM1.

GPIO configuration for Tripzone

The GPIO pins GPIO12 and GPIO13 that are designated as trip zones in the given code correspond to TZ1 and TZ2, respectively. This is the pertinent code:

GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;  // Enable pull-up on GPIO12 (TZ1)
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;  // Enable pull-up on GPIO13 (TZ2)

i’ve also set the GPIO pins to operate asynchronously, which means they do not require synchronization with the system clock (SYSCLKOUT):

GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;  // Asynch input GPIO12 (TZ1)
GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3;  // Asynch input GPIO13 (TZ2)

Additionally, you’ve set up these pins to be used as ePWM1 trip zones:

GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;  // Configure GPIO12 as TZ1
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;  // Configure GPIO13 as TZ2

GPIO Pin Selection

The pin configurations for the Gpio trip zone are displayed below in accordance with the datasheet.

ePWM Module Setup

Code Explanation: Understanding how to set up the ePWM module is crucial before exploring trip zones. In this paragraph, we shall clarify:

• starting up the ePWM module.
• setting up variables like period, phase, and count mode.
• establishing compare values for accurate control.

Epwm setup details can be found in the pwm project.

 EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;

    EPwm1Regs.TBPRD                     = 900;            // 900 for 100KHz
    EPwm1Regs.TBPHS.half.TBPHS          = 0;              // Set Phase register to zero
    EPwm1Regs.TBCTL.bit.CTRMODE         = TB_COUNT_UP;    // Asymmetrical mode
    EPwm1Regs.TBCTL.bit.PHSEN           = TB_DISABLE;     // Master module
    EPwm1Regs.TBCTL.bit.PRDLD           = TB_SHADOW;

    EPwm1Regs.CMPA.half.CMPA = 450;
    EPwm1Regs.CMPB = 450;

    EPwm1Regs.TBCTL.bit.HSPCLKDIV       = TB_DIV1;        // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV          = TB_DIV1;

    EPwm1Regs.TBCTL.bit.SYNCOSEL        = TB_CTR_ZERO;      // Sync down-stream module
    EPwm1Regs.CMPCTL.bit.SHDWAMODE      = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE      = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE      = CC_CTR_ZERO;      // load on CTR=Zero
    EPwm1Regs.CMPCTL.bit.LOADBMODE      = CC_CTR_ZERO;      // load on CTR=Zero
    EPwm1Regs.AQCTLA.bit.ZRO            = AQ_SET;           // set actions for EPWM1A
    EPwm1Regs.AQCTLA.bit.CAU            = AQ_CLEAR;

    EPwm1Regs.AQCTLB.bit.ZRO            = AQ_SET;           // set actions for EPWM1A
    EPwm1Regs.AQCTLB.bit.CBU            = AQ_CLEAR;

Trip Zone Configuration

What you mean by TZ bar

TZ1: This usually represents the state of trip zone 1. It could be a binary signal that is active (high or logic 1) when a fault condition is detected in trip zone 1.

TZ1 bar: This is the logical NOT of TZ1. It is active (high or logic 1) when TZ1 is inactive (low or logic 0), and vice versa. Essentially, it indicates the absence of a fault condition in trip zone 1.

Trip-Zone Select Register (TZSEL) 

1. EPwm1Regs.TZSEL.bit.OSHT1 and EPwm1Regs.TZSEL.bit.OSHT2.

• The One-Shot Trip Zone Select for ePWM1 is configured using these registers and bits.
• Trip zone 1 corresponds to OSHT1.
• Trip zone 2 is comparable to OSHT2.
• When these bits are set to 1, the corresponding trip zones are made available for one-shot action. This indicates that the trip zone event will only be triggered once (one-shot) whenever a fault condition arises in the designated trip zone until the fault is resolved.

Trip-Zone Control Register (TZCTL)

1. EPwm1Regs.TZCTL.bit.TZA and EPwm1Regs.TZCTL.bit.TZB

• When a trip zone event happens in ePWM1, these registers and bits are used to set the course of action that will be done.
• TZA and TZB are equivalent to ePWM1A and ePWM1B, respectively.
• When a trip zone event happens, TZ_FORCE_LO instructs the trip zone action to force the corresponding PWM output to be low. In reaction to a failure event, it aggressively drives the PWM signal low.

Consider the following real-world example to gain a better understanding of these settings:

Let’s say you’re controlling a motor with ePWM1. You’ve configured two trip zones:

• OSHT1 is connected to trip zone 1, which, in this example, is a GPIO pin 12 over-current sensor.
• OSHT2 is connected to trip zone 2, which, for example, connects to a GPIO pin 13 over-voltage sensor.

For both trip zones, you have TZA and TZB set to TZ_FORCE_LO. When a fault condition is found, the following occurs:

1. Over-Current Fault (Trip Zone 1):

• If the over-current sensor on GPIO pin 12 detects a fault condition, it triggers trip zone 1 (OSHT1).

Since TZ_FORCE_LO is configured for TZA, the ePWM1A output will be forced low. This action can be used to quickly cut off power to the motor or take other protective measures to prevent damage.

• Over-Voltage Fault (Trip Zone 2):

• If the over-voltage sensor on GPIO pin 13 detects a fault condition, it triggers trip zone 2 (OSHT2).

Again, since TZ_FORCE_LO is configured for TZB, the ePWM1B output will be forced low. This action could be used to disable a specific phase of the motor drive or activate a braking mechanism.

    EALLOW;

    // Trip Zone Configuration
    EPwm1Regs.TZSEL.bit.OSHT1 = 1;
    EPwm1Regs.TZSEL.bit.OSHT2 = 1;
    EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO;
    EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
    EPwm1Regs.TZCLR.bit.OST = 1;

    EDIS;

Trip-Zone Submodule Registers

Trip-Zone Select Register (TZSEL) Table

Trip-Zone Control Register (TZCTL) Table

Trip-Zone Clear Register (TZCLR) Table

Checking Trip Zones

1. GPIO12 Configuration: GPIO12 is a trip zone input in your code. You set the qualifying mode to asynchronous (GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3) and enabled the pull-up resistor (GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0), indicating that it would be monitored for asynchronous (unqualified) input changes.

• Shorting GPIO12 to Ground: By briefly connecting GPIO12 to the ground, you essentially reduced its voltage to 0 volts. The trip zone is intended to identify events or fault conditions like these. It is standard practice to simulate a problem, such as an over-current condition, by shorting GPIO12 to the ground.

• Trip Zone Activation: You have set up the trip zone in your code to act when a fault situation is discovered. You have specifically set EPwm1Regs.TZCTL.bit.TZA to TZ_FORCE_LO, causing the PWM pin (ePWM1A) to be forced to go low whenever a trip zone event takes place. In reaction to a failure, this action is made to safeguard the system, such as turning off a motor.

• Trip Zone Flag: After activating, the trip zone raises a flag to show that a fault situation has been identified. Using EPwm1Regs.TZCLR.bit.OST = 1; in your code, you can clear this flag. By acknowledging the error and enabling the system to act in response to the error state without repeatedly acting, clearing the flag is crucial.

Here’s a step-by-step breakdown of what happened:

• Initially, GPIO12 is at a high state due to the pull-up resistor.
• When you short GPIO12 to ground, it rapidly changes from high to low, causing an asynchronous input change.
• This asynchronous input change is detected by the trip zone associated with GPIO12.
• The trip zone, upon detecting the fault condition, forces the PWM pin (ePWM1A) to go low (TZ_FORCE_LO).
• Simultaneously, the trip zone sets a flag to indicate that the fault condition has occurred.
• Your code clears the trip zone flag (TZCLR.bit.OST = 1) to acknowledge the fault and potentially take additional actions, such as shutting down a motor or triggering an alarm, depending on your system’s configuration.

The flow control diagram of Checking Trip Zones

Final Code

#include "F2806x_Device.h"
#include "F2806x_Examples.h"

void GpioConfig(void);

void InitEPwm_1();

void main(void)
{

    InitSysCtrl();
    InitGpio();
    GpioConfig();
    InitEPwm_1();

    while (1)
    {

        if (EPwm1Regs.TZFLG.bit.OST==1)
        {
            EALLOW;
            EPwm1Regs.TZCLR.bit.OST = 1; // clear the OST flag 
            EDIS;
        }

    }
}






void InitEPwm_1()
{
    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    EDIS;

    EPwm1Regs.TBPRD                     = 900;            // 900 for 100KHz
    EPwm1Regs.TBPHS.half.TBPHS          = 0;              // Set Phase register to zero
    EPwm1Regs.TBCTL.bit.CTRMODE         = TB_COUNT_UP;    // Asymmetrical mode
    EPwm1Regs.TBCTL.bit.PHSEN           = TB_DISABLE;     // Master module
    EPwm1Regs.TBCTL.bit.PRDLD           = TB_SHADOW;

    EPwm1Regs.CMPA.half.CMPA = 450;
    EPwm1Regs.CMPB = 450;

    EPwm1Regs.TBCTL.bit.HSPCLKDIV       = TB_DIV1;        // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV          = TB_DIV1;

    EPwm1Regs.TBCTL.bit.SYNCOSEL        = TB_CTR_ZERO;      // Sync down-stream module
    EPwm1Regs.CMPCTL.bit.SHDWAMODE      = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE      = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE      = CC_CTR_ZERO;      // load on CTR=Zero
    EPwm1Regs.CMPCTL.bit.LOADBMODE      = CC_CTR_ZERO;      // load on CTR=Zero
    EPwm1Regs.AQCTLA.bit.ZRO            = AQ_SET;           // set actions for EPWM1A
    EPwm1Regs.AQCTLA.bit.CAU            = AQ_CLEAR;

    EPwm1Regs.AQCTLB.bit.ZRO            = AQ_SET;           // set actions for EPWM1A
    EPwm1Regs.AQCTLB.bit.CBU            = AQ_CLEAR;

    EALLOW;
    EPwm1Regs.TZSEL.bit.OSHT1       = 1;                    // TZ1  One-shot trip zone select
    EPwm1Regs.TZSEL.bit.OSHT2       = 1;
    EPwm1Regs.TZCTL.bit.TZA         = TZ_FORCE_LO;          // When triggered, force TZ1A Low
    EPwm1Regs.TZCTL.bit.TZB         = TZ_FORCE_LO;          // When triggered, force TZ1A Low
    EPwm1Regs.TZCLR.bit.OST = 1;
    EDIS;


    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    EDIS;

}





void GpioConfig(void)
{
    EALLOW;

    //--------------------------------------------------------------------------------------
    //      GPIO-00,01 - PIN FUNCTION = PWM1A
    GpioCtrlRegs.GPAPUD.bit.GPIO0=0; //
    GpioCtrlRegs.GPAPUD.bit.GPIO1=0;

    GpioCtrlRegs.GPAMUX1.bit.GPIO0      = 1;     // 0=GPIO,  1=EPWM1A,      2=Resv,         3=Resv          // PWM1A
    GpioCtrlRegs.GPAMUX1.bit.GPIO1      = 1;     // 0=GPIO,  1=EPWM1B,      2=Resv,         3=COMP1OUT      // PWM1B

    //--------------------------------------------------------------------------------------
    //     Trip Zone GPIO'S
    // Enable internal pull-up for the selected pins
    // Pull-ups can be enabled or disabled by the user.
    // This will enable the pullups for the specified pins.
    // Comment out other unwanted lines.
    //
    GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;    // Enable pull-up on GPIO12 (TZ1)
    GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;    // Enable pull-up on GPIO13 (TZ2)
    GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;    // Enable pull-up on GPIO14 (TZ3)

    //
    // Set qualification for selected pins to asynch only
    // Inputs are synchronized to SYSCLKOUT by default.
    // This will select asynch (no qualification) for the selected pins.
    // Comment out other unwanted lines.
    //
    GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;  // Asynch input GPIO12 (TZ1)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3;  // Asynch input GPIO13 (TZ2)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3;  // Asynch input GPIO14 (TZ3)


    //
    // Configure TZ pins using GPIO regs
    // This specifies which of the possible GPIO pins will be TZ functional
    // pins.
    // Comment out other unwanted lines.
    //
    GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;  // Configure GPIO12 as TZ1
    GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;  // Configure GPIO13 as TZ2
    GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1;  // Configure GPIO14 as TZ3

    GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 2;// Qualification using 6 samples for TZ1
    GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 2;// Qualification using 6 samples for TZ1
    GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 2;// Qualification using 6 samples for TZ1

    GpioCtrlRegs.GPACTRL.bit.QUALPRD1 = 0x80;               // Sampling Period = 4 × TSYSCLKOUT for GPIO8 to GPIO15.
    GpioCtrlRegs.GPACTRL.bit.QUALPRD2 = 0x80;               // Sampling Period = 4 × TSYSCLKOUT for GPIO16 to GPIO23.


    EDIS;

}