How to interface UART communication using PIC MPLAB

In this tutorial we learn to Enable UART communication with PIC Microcontroller and how to transfer data to and from your Computer. Now, we will equip our self with a new communication tool called UART which widely used in most of the Microcontroller projects. Check here our complete PIC Microcontroller Tutorials using MPLAB and XC8.

Requirements:

Hardware:

  • PIC24 Perf Board
  • RS232 to USB converter Module
  • Computer
  • PICkit 3 Programmer

Software:

  • MPLABX
  • HyperTerminal

PIC24FJ256GA110 FAMILY

  • On-Chip 2.5V Voltage Regulator
  • 8 MHz Internal Oscillator
  • 32-Bit by 16-Bit Hardware Divider
  • Three 3-Wire/4-Wire SPI modules (support 4 Frame modes) with 8-Level FIFO Buffer
  • Three I2C modules support Multi-Master/Slave modes and 7-Bit/10-Bit Addressing
  • Four UART modules:

Pin diagram of PIC24

Fig. 1: PIC24FJ128GA106 Pinouts

Now we are going to see PIC24 Interrupt Tutorial.

Both, Parallel and Serial modes of communication have certain advantages and disadvantages over one another. The serial communication is a preferred option due to its ability of long distance communication with error detection capability. The microcontrollers consist of an inbuilt hardware unit known as USART (Universal Synchronous Asynchronous Reception and Transmission) to facilitate serial transfer of data. For more details, refer to USART in AVR section.

Before starting USART, some general terms related to communication need to be understood. These terms are explained below.

Asynchronous Communication:

In this type of communication, both Transmitter (Tx) and Receiver (Rx) work on different clocks which means that they are not synchronized. Start and Stop bits are also sent with each Data byte to identify the data.

Synchronous Communication:

In this type of communication, both Tx and Rx are synchronized with the same clock and no Start or Stop bits are used.

Full-duplex Communication:

When either of the devices can send and receive data at the same instant, they are said to have full-duplex communication.

Fig. 2: Block Diagram Of Full-Duplex Communication in USART

Half-duplex Communication:

In this type of communication, a device can either behave as Transmitter or Receiver at an instant which means that a device can’t transmit data when it is receiving and vice versa.

Fig. 3: Block Diagram Of Half-Duplex Communication in USART

This PIC24 tutorial is a part of UART Communication using Pic Microcontroller.  I recommend you to read this tutorial first. Because in that guide, we explain the following concepts of UART Module:

  • PIC UART Module Registers
  • Send data serially ( send string with UART)
  • Receive data Serially (receive string with pic UART)

Why do we need to use PIC UART Interrupt?

But we used a polling method to receive string or data with pic UART module. But now we will see an interrupt method to receive data. Because polling is not an efficient method and it halts microcontroller execution at the same location waiting for the condition to meet. The polling method is kind of a round-robin method.  The main disadvantage of this technique is the wastage of microcontroller time and resources.

Difference between Polling and Interrupt Method

This figure shows the comparison of the polling vs interrupt technique. In the first case, it keeps waiting until the specified condition is met. But in another case, the microcontroller will keep doing something else and as soon as interrupt response comes, it executes interrupt and return to the original program location where it left execution.

PIC24 UART Interrupt Registers

  • Transmit Status and Control (UxTXREG)
  • Receive Status and Control (UxRXREG.)
  • Baud Rate Control (UxBRG)

Furthermore, to use pic UART interrupt, we need to configure some bits of these registers also

The primary features of the UART module are:

• Full-Duplex, 8 or 9-Bit Data Transmission through the UxTX and UxRX Pins

• Even, Odd or No Parity Options (for 8-bit data)

  • One or Two Stop Bits
  •  Hardware Flow Control Option with UxCTS and UxRTS Pins

• Fully Integrated Baud Rate Generator with 16-Bit Prescaler

• Baud Rates Ranging from 1 Mbps to 15 bps at 16 MIPS

• 4-Deep, First-In First-Out (FIFO) Transmit Data Buffer

• 4-Deep FIFO Receive Data Buffer

• Parity, Framing and Buffer Overrun Error Detection

• Support for 9-Bit mode with Address Detect (9th bit = 1)

• Transmit and Receive Interrupts

• Loopback mode for Diagnostic Support

• Support for Sync and Break Characters

• Supports Automatic Baud Rate Detection

• IrDA Encoder and Decoder Logic

• 16x Baud Clock Output for IrDA Support

A simplified block diagram of the UART is shown in Figure 17-1. The UART module consists of these key

Important hardware elements:

• Baud Rate Generator

• Asynchronous Transmitter

• Asynchronous Receiver

UART Baud Rate Generator (BRG)

The UART module includes a dedicated 16-bit Baud Rate Generator. The UxBRG register controls the period of a free-running, 16-bit timer. Equation 17-1 shows the formula for computation of the baud rate with BRGH = 0.

Example 17-1 shows the calculation of the baud rate error for the following conditions:

• FCY = 4 MHz

• Desired Baud Rate = 9600

The maximum baud rate (BRGH = 0) possible is FCY/16 (for UxBRG = 0) and the minimum baud rate possible is FCY/(16 * 65536). Equation 17-2 shows the formula for computation of the baud rate with BRGH = 1.

The maximum baud rate (BRGH = 1) possible is FCY/4 (for UxBRG = 0) and the minimum baud rate possible is FCY/(4 * 65536). Writing a new value to the UxBRG register causes the BRG timer to be reset (cleared). This ensures the BRG does not wait for a timer overflow before generating the new baud rate.

Transmitting in 8-Bit Data Mode

1. Set up the UART:

a) Write appropriate values for data, parity and Stop bits.

b) Write appropriate baud rate value to the UxBRG register.

c) Set up transmit and receive interrupt enable and priority bits.

2. Enable the UART.

3. Set the UTXEN bit (causes a transmit interrupt two cycles after being set).

4. Write data byte to lower byte of UxTXREG word. The value will be immediately transferred to the Transmit Shift Register (TSR) and the serial bit stream will start shifting out with the next rising edge of the baud clock.

5. Alternately, the data byte may be transferred while UTXEN = 0, and then the user may set UTXEN. This will cause the serial bit stream to begin immediately because the baud clock will start from a cleared state.

6. A transmit interrupt will be generated as per interrupt control bit, UTXISELx.

Receiving in 8-Bit or 9-Bit Data

Mode

1. Set up the UART (as described in Section 17.2

“Transmitting in 8-Bit Data Mode”).

2. Enable the UART.

3. A receive interrupt will be generated when one or more data characters have been received as per interrupt control bit, URXISELx.

4. Read the OERR bit to determine if an overrun error has occurred. The OERR bit must be reset in software.

5. Read UxRXREG. The act of reading the UxRXREG character will move the next character to the top of the receive FIFO, including a new set of PERR and FERR values.

REGISTER : UxMODE: UARTx MODE REGISTER

bit 15 UARTEN: UARTx Enable bit(1)

1 = UARTx is enabled; all UARTx pins are controlled by UARTx as defined by UEN[1:0]

0 = UARTx is disabled; all UARTx pins are controlled by port latches, UARTx power consumption is minimal

bit 14 Unimplemented: Read as ‘0’

bit 13 USIDL: Stop in Idle Mode bit

1 = Discontinues module operation when the device enters Idle mode

0 = Continues module operation in Idle mode

bit 12 IREN: IrDA® Encoder and Decoder Enable bit(2)

1 = IrDA encoder and decoder are enabled

0 = IrDA encoder and decoder are disabled

bit 11 RTSMD: Mode Selection for UxRTS Pin bit

1 = UxRTS pin in Simplex mode

0 = UxRTS pin in Flow Control mode

bit 10 Unimplemented: Read as ‘0’

bit 9-8 UEN[1:0]: UARTx Enable bits

11 = UxTX, UxRX and BCLKx pins are enabled and used; UxCTS pin is controlled by port latches

10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used

01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches

00 = UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/BCLKx pins are controlled by port

latches

bit 7 WAKE: Wake-up on Start Bit Detect During Sleep Mode Enable bit

1 = UARTx will continue to sample the UxRX pin; interrupt generated on falling edge, bit cleared in

hardware on following rising edge

0 = No wake-up enabled

bit 6 LPBACK: UARTx Loopback Mode Select bit

1 = Enables Loopback mode

0 = Loopback mode is disabled

bit 5 ABAUD: Auto-Baud Enable bit

1 = Enables baud rate measurement on the next character – requires reception of a Sync field (55h);

cleared in hardware upon completion

0 = Baud rate measurement is disabled or completed

Note 1: If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn pin. See

Section 10.4 “Peripheral Pin Select (PPS)” for more information.

2: This feature is only available for the 16x BRG mode (BRGH = 0).

bit 4 RXINV: Receive Polarity Inversion bit

1 = UxRX Idle state is ‘0’

0 = UxRX Idle state is ‘1’

bit 3 BRGH: High Baud Rate Enable bit

1 = High-Speed mode (baud clock generated from FCY/4)

0 = Standard mode (baud clock generated from FCY/16)

bit 2-1 PDSEL[1:0]: Parity and Data Selection bits

11 = 9-bit data, no parity

10 = 8-bit data, odd parity

01 = 8-bit data, even parity

00 = 8-bit data, no parity

bit 0 STSEL: Stop Bit Selection bit

1 = Two Stop bits

0 = One Stop bit

REGISTER 17-1: UxMODE: UARTx MODE REGISTER (CONTINUED)

Note 1: If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn pin. See

Section 10.4 “Peripheral Pin Select (PPS)” for more information.

REGISTER : UxSTA: UARTx STATUS AND CONTROL REGISTER

bit 15,13 UTXISEL[1:0]: Transmission Interrupt Mode Selection bits

11 = Reserved; do not use

10 = Interrupt when a character is transferred to the Transmit Shift Register (TSR), and as a result, the

transmit buffer becomes empty

01 = Interrupt when the last character is shifted out of the Transmit Shift Register; all transmit

operations are completed

00 = Interrupt when a character is transferred to the Transmit Shift Register (this implies there is at least

one character open in the transmit buffer)

bit 14 UTXINV: IrDA® Encoder Transmit Polarity Inversion bit(2)

IREN = 0:

1 = UxTX Idle ‘0’

0 = UxTX Idle ‘1’

IREN = 1:

1 = UxTX Idle ‘1’

0 = UxTX Idle ‘0’

bit 12 Unimplemented: Read as ‘0’

bit 11 UTXBRK: Transmit Break bit

1 = Sends Sync Break on next transmission – Start bit, followed by twelve ‘0’ bits, followed by Stop bit;

cleared by hardware upon completion

0 = Sync Break transmission is disabled or completed

bit 10 UTXEN: Transmit Enable bit(2)

1 = Transmit enabled; UxTX pin is controlled by UARTx

0 = Transmit disabled; any pending transmission is aborted and the buffer is reset, UxTX pin is controlled

by port

bit 9 UTXBF: Transmit Buffer Full Status bit (read-only)

1 = Transmit buffer is full

0 = Transmit buffer is not full; at least one more character can be written

bit 8 TRMT: Transmit Shift Register Empty bit (read-only)

1 = Transmit Shift Register is empty and transmit buffer is empty (the last transmission has completed)

0 = Transmit Shift Register is not empty, a transmission is in progress or queued

bit 7-6 URXISEL[1:0]: Receive Interrupt Mode Selection bits

11 = Interrupt is set on RSR transfer, making the receive buffer full (i.e., has four data characters)

10 = Interrupt is set on RSR transfer, making the receive buffer 3/4 full (i.e., has three data characters)

0x = Interrupt is set when any character is received and transferred from the RSR to the receive buffer;

receive buffer has one or more characters

Note 1: Value of bit only affects the transmit properties of the module when the IrDA® encoder is enabled (IREN = 1).

2: If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn pin. See

Section 10.4 “Peripheral Pin Select (PPS)” for more information.

bit 5 ADDEN: Address Character Detect bit (bit 8 of received data = 1)

1 = Address Detect mode enabled; if 9-bit mode is not selected, this does not take effect

0 = Address Detect mode disabled

bit 4 RIDLE: Receiver Idle bit (read-only)

1 = Receiver is Idle

0 = Receiver is active

bit 3 PERR: Parity Error Status bit (read-only)

1 = Parity error has been detected for the current character (character at the top of the receive FIFO)

0 = Parity error has not been detected

bit 2 FERR: Framing Error Status bit (read-only)

1 = Framing error has been detected for the current character (character at the top of the receive FIFO)

0 = Framing error has not been detected

bit 1 OERR: Receive Buffer Overrun Error Status bit (clear/read-only)

1 = Receive buffer has overflowed

0 = Receive buffer has not overflowed (clearing a previously set OERR bit (1  0 transition) will reset

the receiver buffer and the RSR to the empty state)

bit 0 URXDA: Receive Buffer Data Available bit (read-only)

1 = Receive buffer has data; at least one more character can be read

0 = Receive buffer is empty

Programming steps: 

Configuration of EUSART-

STEP 1 set configuration bits MPLAB x

// CONFIG3
#pragma config WPFP = WPFP511           // Write Protection Flash Page Segment Boundary (Highest Page (same as page 85))
#pragma config WPDIS = WPDIS            // Segment Write Protection Disable bit (Segmented code protection disabled)
#pragma config WPCFG = WPCFGDIS         // Configuration Word Code Page Protection Select bit (Last page(at the top of program memory) and Flash configuration words are not protected)
#pragma config WPEND = WPENDMEM         // Segment Write Protection End Page Select bit (Write Protect from WPFP to the last page of memory)

// CONFIG2
#pragma config POSCMOD = XT             // Primary Oscillator Select (XT oscillator mode selected)
#pragma config IOL1WAY = ON             // IOLOCK One-Way Set Enable bit (Write RP Registers Once)
#pragma config OSCIOFNC = OFF           // Primary Oscillator Output Function (OSCO functions as CLKO (FOSC/2))
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor (Both Clock Switching and Fail-safe Clock Monitor are disabled)
#pragma config FNOSC = PRI              // Oscillator Select (Primary oscillator (XT, HS, EC))
#pragma config IESO = ON                // Internal External Switch Over Mode (IESO mode (Two-speed start-up) enabled)

// CONFIG1
#pragma config WDTPS = PS32768          // Watchdog Timer Postscaler (1:32,768)
#pragma config FWPSA = PR128            // WDT Prescaler (Prescaler ratio of 1:128)
#pragma config WINDIS = OFF             // Watchdog Timer Window (Standard Watchdog Timer is enabled,(Windowed-mode is disabled))
#pragma config FWDTEN = ON              // Watchdog Timer Enable (Watchdog Timer is enabled)
#pragma config ICS = PGx1               // Comm Channel Select (Emulator functions are shared with PGEC1/PGED1)
#pragma config GWRP = OFF               // General Code Segment Write Protect (Writes to program memory are allowed)
#pragma config GCP = OFF                // General Code Segment Code Protect (Code protection is disabled)
#pragma config JTAGEN = ON              // JTAG Port Enable (JTAG port is enabled)




STEP 2 UART Pin Configuration

    
    // uart pin selection 
    OSCCON = 0x0000;
    OSCTUN = 0x0000;
    CLKDIV = 0x0000;
    //resetSource = RCON;
    RCON = 0x00;
    INTCON1bits.NSTDIS = 1;
    AD1PCFGL = 0xFF; //dISABLE ANALOG I/P'S
    
    RPINR18bits.U1RXR = 6; // Assign U1RXR to RP6
    _TRISB6 = 1; //CONFIGURE PIN TO I/P
    RPOR3bits.RP7R = 3; //Assign U1TX To Pin RP7
    _TRISB7 = 0; //CONFIGURE PIN TO O/P
    
     
      
    //uart_index=0;
    CNPU1bits.CN9PUE = 1;



STEP 3 UART initialization

void UART1Init(void)
{
//	U1BRG = 25;		// 9600 @ 8MHZ
	U1BRG = 32;		// 9600 @ 10MHZ

	U1MODEbits.UARTEN = 1;		// UART2 is Enabled
	
	U1MODEbits.USIDL = 0;		// Continue operation at Idlestate
	U1MODEbits.IREN = 0;		// IrDA En/Decoder is disabled
	U1MODEbits.RTSMD = 0;		// flow control mode
	U1MODEbits.UEN1 = 0b00;		// UTX, RTX, are enabled U1CTS, U1RTS are disabled
	U1MODEbits.UEN0 = 0b00;		// UTX, RTX, are enabled U1CTS, U1RTS are disabled
	U1MODEbits.WAKE = 1;		// Wake-up on start bit is enabled
	U1MODEbits.LPBACK = 0;		// Loop-back is disabled
	U1MODEbits.ABAUD = 0;		// auto baud is disabled
	U1MODEbits.RXINV = 0;		// No RX inversion
	U1MODEbits.BRGH = 0;		// low boud rate
	U1MODEbits.PDSEL = 0b00; 	// 8bit no parity
	U1MODEbits.STSEL = 0;		// one stop bit	


	U1STAbits.UTXISEL1 = 0b00;		
	U1STA &= 0xDFFF;			// clear TXINV by bit masking
	U1STAbits.UTXBRK = 0;		// sync break tx is disabled
	U1STAbits.UTXEN = 1;		//transmit  is enabled
	U1STAbits.URXISEL = 0b00;	// interrupt flag bit is set when RXBUF is filled whith 1 character
	U1STAbits.ADDEN = 0;		// address detect mode is disabled
	U1STAbits.RIDLE = 0;

	IPC2bits.U1RXIP = 7;        // sET uart1 Priority to 7
	IFS0bits.U1RXIF = 0;		// clear interrupt flag of rx
	IFS0bits.U1TXIF = 0;		// clear interrupt flag of rx
	IEC0bits.U1RXIE = 1;		// enable rx recieved data interrupt
	IEC0bits.U1TXIE = 0;
}


STEP 4 For Transmission Byte

void UART1TransmitByte(char tx_byte)
{
	U1TXREG = tx_byte;
	while(!(U1STAbits.TRMT))
	{
	}
}



STEP 5 Transmit String

void UART1TransmitString(char *tx_str)
{
	char ch;
	while(*tx_str != 0x00)
	{
		ch = *tx_str;
		U1TXREG = ch;
		while(!(U1STAbits.TRMT))
		{
		}
		tx_str++;
	}
}



STEP 6 UART Interrupt

void __attribute__((interrupt,no_auto_psv)) _U1RXInterrupt()
{
	char ch;
 
	_U1RXIF = 0;
	ch = U1RXREG;
    
    uart1_buffer[uart_index++]=ch;
    
    if(uart_index>300)uart_index=0;
    
	
}


STEP 8 Send String

UART1TransmitString(“MEVIHUB.COM\r\n”);

STEP 9 Receive String

 while(1)
    {
    
       if(uart_index>0)
       {
           UART1TransmitString(uart1_buffer);
           uart_index = 0;
           memset(uart1_buffer,'\0',sizeof(uart1_buffer));
       }
    }


FINAL CODE

/*
 * File:   main9.c
 * Author: admin
 *
 * Created on 7 April, 2021, 12:34 PM
 */
// add delay header file 
// add frequency 
#define    FCY    10000000UL    // Instruction cycle frequency, Hz - required for __delayXXX() to work
#include<libpic30.h>

#include "xc.h"
#include<stdio.h>
#include<string.h>
#include <xc.h>


// PIC24FJ128GA106 Configuration Bit Settings

// 'C' source line config statements

// CONFIG3
#pragma config WPFP = WPFP511           // Write Protection Flash Page Segment Boundary (Highest Page (same as page 85))
#pragma config WPDIS = WPDIS            // Segment Write Protection Disable bit (Segmented code protection disabled)
#pragma config WPCFG = WPCFGDIS         // Configuration Word Code Page Protection Select bit (Last page(at the top of program memory) and Flash configuration words are not protected)
#pragma config WPEND = WPENDMEM         // Segment Write Protection End Page Select bit (Write Protect from WPFP to the last page of memory)

// CONFIG2
#pragma config POSCMOD = XT             // Primary Oscillator Select (XT oscillator mode selected)
#pragma config IOL1WAY = ON             // IOLOCK One-Way Set Enable bit (Write RP Registers Once)
#pragma config OSCIOFNC = OFF           // Primary Oscillator Output Function (OSCO functions as CLKO (FOSC/2))
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor (Both Clock Switching and Fail-safe Clock Monitor are disabled)
#pragma config FNOSC = PRI              // Oscillator Select (Primary oscillator (XT, HS, EC))
#pragma config IESO = ON                // Internal External Switch Over Mode (IESO mode (Two-speed start-up) enabled)

// CONFIG1
#pragma config WDTPS = PS32768          // Watchdog Timer Postscaler (1:32,768)
#pragma config FWPSA = PR128            // WDT Prescaler (Prescaler ratio of 1:128)
#pragma config WINDIS = OFF             // Watchdog Timer Window (Standard Watchdog Timer is enabled,(Windowed-mode is disabled))
#pragma config FWDTEN = ON              // Watchdog Timer Enable (Watchdog Timer is enabled)
#pragma config ICS = PGx1               // Comm Channel Select (Emulator functions are shared with PGEC1/PGED1)
#pragma config GWRP = OFF               // General Code Segment Write Protect (Writes to program memory are allowed)
#pragma config GCP = OFF                // General Code Segment Code Protect (Code protection is disabled)
#pragma config JTAGEN = ON              // JTAG Port Enable (JTAG port is enabled)


// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

   char uart1_buffer[100];
    int uart_index;
// uart init funtion 

void UART1Init(void)
{
//	U1BRG = 25;		// 9600 @ 8MHZ
	U1BRG = 32;		// 9600 @ 10MHZ

	U1MODEbits.UARTEN = 1;		// UART2 is Enabled
	
	U1MODEbits.USIDL = 0;		// Continue operation at Idlestate
	U1MODEbits.IREN = 0;		// IrDA En/Decoder is disabled
	U1MODEbits.RTSMD = 0;		// flow control mode
	U1MODEbits.UEN1 = 0b00;		// UTX, RTX, are enabled U1CTS, U1RTS are disabled
	U1MODEbits.UEN0 = 0b00;		// UTX, RTX, are enabled U1CTS, U1RTS are disabled
	U1MODEbits.WAKE = 1;		// Wake-up on start bit is enabled
	U1MODEbits.LPBACK = 0;		// Loop-back is disabled
	U1MODEbits.ABAUD = 0;		// auto baud is disabled
	U1MODEbits.RXINV = 0;		// No RX inversion
	U1MODEbits.BRGH = 0;		// low boud rate
	U1MODEbits.PDSEL = 0b00; 	// 8bit no parity
	U1MODEbits.STSEL = 0;		// one stop bit	


	U1STAbits.UTXISEL1 = 0b00;		
	U1STA &= 0xDFFF;			// clear TXINV by bit masking
	U1STAbits.UTXBRK = 0;		// sync break tx is disabled
	U1STAbits.UTXEN = 1;		//transmit  is enabled
	U1STAbits.URXISEL = 0b00;	// interrupt flag bit is set when RXBUF is filled whith 1 character
	U1STAbits.ADDEN = 0;		// address detect mode is disabled
	U1STAbits.RIDLE = 0;

	IPC2bits.U1RXIP = 7;        // sET uart1 Priority to 7
	IFS0bits.U1RXIF = 0;		// clear interrupt flag of rx
	IFS0bits.U1TXIF = 0;		// clear interrupt flag of rx
	IEC0bits.U1RXIE = 1;		// enable rx recieved data interrupt
	IEC0bits.U1TXIE = 0;
}

// uart transmit function 


void UART1TransmitByte(char tx_byte)
{
	U1TXREG = tx_byte;
	while(!(U1STAbits.TRMT))
	{
	}
}


// uart read string function


void UART1TransmitString(char *tx_str)
{
	char ch;
	while(*tx_str != 0x00)
	{
		ch = *tx_str;
		U1TXREG = ch;
		while(!(U1STAbits.TRMT))
		{
		}
		tx_str++;
	}
}


// write code for receiving data using interrupt 


void __attribute__((interrupt,no_auto_psv)) _U1RXInterrupt()
{
	char ch;
 
	_U1RXIF = 0;
	ch = U1RXREG;
    
    uart1_buffer[uart_index++]=ch;
    
    if(uart_index>300)uart_index=0;
    
	
}

int main(void) {
    
    
    // uart pin selection 
    OSCCON = 0x0000;
    OSCTUN = 0x0000;
    CLKDIV = 0x0000;
    //resetSource = RCON;
    RCON = 0x00;
    INTCON1bits.NSTDIS = 1;
    AD1PCFGL = 0xFF; //dISABLE ANALOG I/P'S
    
    RPINR18bits.U1RXR = 6; // Assign U1RXR to RP6
    _TRISB6 = 1; //CONFIGURE PIN TO I/P
    RPOR3bits.RP7R = 3; //Assign U1TX To Pin RP7
    _TRISB7 = 0; //CONFIGURE PIN TO O/P
    
     
      
    //uart_index=0;
    CNPU1bits.CN9PUE = 1;
    
    UART1Init();
        UART1TransmitString("MEVIHUB.COM\r\n");
        __delay_ms(500);
    while(1)
    {
    
       if(uart_index>0)
       {
           UART1TransmitString(uart1_buffer);
           uart_index = 0;
           memset(uart1_buffer,'\0',sizeof(uart1_buffer));
       }
    }
    
    /// transmission completed 
    
    
    return 0;
}



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