Table of Contents
Overview
In this experiment, we are going to use the timer interrupt to perform the Led blinking operation and to check the time. To perform several tasks at a time we use the timer interrupt.
Components required table
| S.N. | COMPONENTS | DESCRIPTION | QUANTITY |  |
| 1 | LAUNCHXL-F28379D | LAUNCHXL-F28379D | 1 | https://evelta.com/launchxl-f28379d- |
| 2 | Logic Analyser | Logic Analyser | 1 | https://www.amazon.in/New-Logic-Analyser-24MHz-FPGA |
| 3 | USB Cable, A-Male to Mini-B Cord USB 2.0 | USB Cable, A-Male to Mini-B Cord USB 2.0 | 1 | https://www.amazon.in/AmazonBasics-USB-2-0 |
| 4 | connection wires | Jumper Wires | 20 | https://www.amazon.in/YUVS-Jumper-Wires-female |
Introduction
This section describes the three 32-bit CPU-Timers (TIMER0/1/2).CPU-Timer0 and CPU-Timer1 can be used in user applications. CPU-Timer2 is reserved for real-time operating system uses (for example, TI-RTOS). If the application is not using an operating system that utilizes this timer, then CPU-Timer2 can be used in the application. CPU-Timer0 and CPU-Timer1 run off of SYSCLK. CPU-Timer2 normally runs off of SYSCLK, but can also use INTOSC1, INTOSC2, XTAL, and AUXPLLCLK. The CPU-Timer interrupt signals (TINT0, TINT1, TINT2) are connected as shown in Figure 3-11.
A ] The timer registers are connected to the memory bus of the C28x processor.
B ] The CPU Timers are synchronized to SYSCLKOUT.
The general operation of the CPU-Timer is as follows:
- The 32-bit counter register, TIMH: TIM, is loaded with the value in the period register PRDH: PRD
- The counter decrements once every (TPR[TDDRH: TDDR]+1) SYSCLKOUT cycles, where
- TDDRH:TDDR is the timer divider.
- When the counter reaches 0, a timer interrupts the output signal and generates an interrupt pulse.
- The registers listed in Section 3.15 are used to configure the timers.
Final Code
/*
* Timer.c
*
* Created on: 09-Aug-2022
* Author: Admin
*/
#include "F28x_Project.h"
#include "F2837xD_device.h"
#include "F2837xD_Examples.h"
#include "device.h"
#include "driverlib.h"
void initCPUTimers(void);
void configCPUTimer(uint32_t cpuTimer, float freq, float period);
__interrupt void cpuTimer0ISR(void);
void gpio_init(void);
void main(void)
{
Device_init();
Device_initGPIO();
DINT;
Interrupt_initModule();
Interrupt_initVectorTable();
gpio_init();
Interrupt_register(INT_TIMER0, &cpuTimer0ISR);
initCPUTimers();
configCPUTimer(CPUTIMER0_BASE, DEVICE_SYSCLK_FREQ, 500000);
Interrupt_enable(INT_TIMER0);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
EINT;
ERTM;
CPUTimer_startTimer(CPUTIMER0_BASE); // squib 0 timer start
while(1)
{
}
}
void initCPUTimers(void)
{
//
// Initialize timer period to maximum
//
CPUTimer_setPeriod(CPUTIMER0_BASE, 0xFFFFFFFF);
//
// Initialize pre-scale counter to divide by 1 (SYSCLKOUT)
//
CPUTimer_setPreScaler(CPUTIMER0_BASE, 0);
//
// Make sure timer is stopped
//
CPUTimer_stopTimer(CPUTIMER0_BASE);
//
// Reload all counter register with period value
//
CPUTimer_reloadTimerCounter(CPUTIMER0_BASE);
// cpuTimer0IntCount = 0;
}
void configCPUTimer(uint32_t cpuTimer, float freq, float period)
{
uint32_t temp;
//
// Initialize timer period:
//
temp = (uint32_t)(freq / 1000000 * period);
CPUTimer_setPeriod(cpuTimer, temp);
//
// Set pre-scale counter to divide by 1 (SYSCLKOUT):
//
CPUTimer_setPreScaler(cpuTimer, 0);
//
// Initializes timer control register. The timer is stopped, reloaded,
// free run disabled, and interrupt enabled.
// Additionally, the free and soft bits are set
//
CPUTimer_stopTimer(cpuTimer);
CPUTimer_reloadTimerCounter(cpuTimer);
CPUTimer_setEmulationMode(cpuTimer,
CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT);
CPUTimer_enableInterrupt(cpuTimer);
}
__interrupt void cpuTimer0ISR(void)
{
// cpuTimer0IntCount++;
GPIO_togglePin(32);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}
void gpio_init(void)
{
EALLOW;
// HEALTH CHECK LED
GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
GPIO_setMasterCore(32, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_32_GPIO32);
GPIO_setQualificationMode(32, GPIO_QUAL_ASYNC);
EDIS;
}
Output Images
